From 548905a86473101325540446f35ffda8acd0c3bb Mon Sep 17 00:00:00 2001 From: Nathan Lee Date: Fri, 25 Sep 2026 23:24:31 -0500 Subject: scaffold kernel from parts of wkern x86 --- website-emu/src/lib.rs | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) (limited to 'website-emu/src') diff --git a/website-emu/src/lib.rs b/website-emu/src/lib.rs index 7c1a285..ffaa677 100644 --- a/website-emu/src/lib.rs +++ b/website-emu/src/lib.rs @@ -11,8 +11,41 @@ const REGISTER_NAME_WIDTH: u32 = 0b11111; const DRAM_LOAD: u32 = 0x20000000; const OS_LOAD: u32 = 0x80000000; + +const CONSOLE_LOAD: u32 = 0x70000000; + const INITRD_LOAD: u32 = 0; +#[wasm_bindgen] +extern "C" { + #[wasm_bindgen(js_namespace = console)] + fn log(s: &str); +} + +pub struct Uart { + pub addr: u32, + pub value: u8 +} + +impl MemoryDevice for Uart { + fn read(&self, address: u32) -> Result { + if (address == self.addr) { + Ok(self.value) + } else { + Err(()) + } + } + + fn write(&mut self, address: u32, value: u8) -> Result<(), ()> { + if (address == self.addr) { + self.value = value; + Ok(()) + } else { + Err(()) + } + } +} + #[wasm_bindgen] pub fn boot(image: &[u8], initrd: &[u8], memory: &[u8]) { let mut cpu_memory = CpuMemory { @@ -41,10 +74,27 @@ pub fn boot(image: &[u8], initrd: &[u8], memory: &[u8]) { dram: initrd.to_vec().into_boxed_slice(), }; + let uart = Uart { + addr: CONSOLE_LOAD, + value: 0 + }; + cpu_memory.register_device( DRAM_LOAD..DRAM_LOAD + memory_len as u32, Box::new(ram_device) ); + cpu_memory.register_device( + OS_LOAD..OS_LOAD + os_size as u32, + Box::new(os_image) + ); + cpu_memory.register_device( + INITRD_LOAD..INITRD_LOAD + initrd_size as u32, + Box::new(initrd_image) + ); + cpu_memory.register_device( + CONSOLE_LOAD..CONSOLE_LOAD + 1, + Box::new(uart) + ); let mut state = CpuState::new(cpu_memory); -- cgit v1.2.3