From a9fb6013db52e231fa2446fd8c512f5e5e92e4d3 Mon Sep 17 00:00:00 2001 From: Nathan Lee Date: Sat, 26 Sep 2026 23:11:30 -0500 Subject: add boot_args support --- website-emu/src/lib.rs | 75 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 74 insertions(+), 1 deletion(-) (limited to 'website-emu/src') diff --git a/website-emu/src/lib.rs b/website-emu/src/lib.rs index b29c901..9abffa0 100644 --- a/website-emu/src/lib.rs +++ b/website-emu/src/lib.rs @@ -21,6 +21,22 @@ extern "C" { fn uart_push_line(line: &str); } +#[repr(C)] +#[derive(Clone,Copy)] +struct BootArgs { + cmd_line: u32, + devices: u32 +} + +#[repr(C)] +#[derive(Clone,Copy)] +struct Device { + device_type: u8, + start: u32, + size: u32, + next: u32 +} + pub struct Uart { pub addr: u32, pub value: u8, @@ -36,6 +52,7 @@ impl MemoryDevice for Uart { } } + //noinspection ALL fn write(&mut self, address: u32, value: u8) -> Result<(), ()> { if address == self.addr { self.value = value; @@ -105,10 +122,66 @@ pub fn boot(image: &[u8], initrd: &[u8], memory: &[u8]) { ); let mut state = CpuState::new(cpu_memory); + let cmd_line = format!( + "mmu=false initrd=initramfs.cpio,{} image=vmwebkrnl.bin,{} iomem=relaxed", + INITRD_LOAD, + OS_LOAD + ); + + + let args_size = size_of::() as u32; + let device_size = size_of::() as u32; + + let dram_device = Device { + device_type: 0, // DRAM + start: DRAM_LOAD, + size: memory_len as u32, + next: DRAM_LOAD + args_size + device_size + }; + let uart_device = Device { + device_type: 1, // UART + start: CONSOLE_LOAD, + size: 1, + next: 0 + }; + let args = BootArgs { + cmd_line: DRAM_LOAD + args_size + device_size * 2, + devices: DRAM_LOAD + args_size + }; + + let args_bytes: &[u8] = unsafe { + std::slice::from_raw_parts( + &args as *const BootArgs as *const u8, + size_of::(), + ) + }; + let dram_bytes: &[u8] = unsafe { + std::slice::from_raw_parts( + &dram_device as *const Device as *const u8, + size_of::(), + ) + }; + let uart_bytes: &[u8] = unsafe { + std::slice::from_raw_parts( + &uart_device as *const Device as *const u8, + size_of::(), + ) + }; + let cmd_line_bytes = cmd_line.as_bytes(); + for i in 0..args_size { + state.memory.write(DRAM_LOAD + i, args_bytes[i as usize]).unwrap(); + } + for i in 0..device_size { + state.memory.write(DRAM_LOAD + args_size + i, dram_bytes[i as usize]).unwrap(); + state.memory.write(DRAM_LOAD + args_size + device_size + i, uart_bytes[i as usize]).unwrap(); + } + for i in 0..cmd_line.len() as u32 { + state.memory.write(DRAM_LOAD + args_size + device_size * 2 + i, cmd_line_bytes[i as usize]).unwrap(); + } state.pc = 0x80000000; state.registers[10] = 0; - state.registers[2] = DRAM_LOAD + memory_len as u32; + state.registers[11] = DRAM_LOAD; while state.on { { -- cgit v1.2.3