From 02a931d1a99b7d5fab90a3d02c474075c6e90fdf Mon Sep 17 00:00:00 2001
From: Nathan Lee <me@nwlee.tech>
Date: Wed, 12 Aug 2026 17:56:28 -0500
Subject: move linker into arch-specific directory

---
 kernel/riscv/linker.ld | 74 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)
 create mode 100644 kernel/riscv/linker.ld

(limited to 'kernel')

diff --git a/kernel/riscv/linker.ld b/kernel/riscv/linker.ld
new file mode 100644
index 0000000..5bf6586
--- /dev/null
+++ b/kernel/riscv/linker.ld
@@ -0,0 +1,74 @@
+OUTPUT_ARCH(riscv)
+ENTRY(_start)
+
+MEMORY
+{
+    ROM   (rx)  : ORIGIN = 0x80000000, LENGTH = 1M
+    RAM   (rwx) : ORIGIN = 0x81000000, LENGTH = 1M
+    LOGRAM (rw) : ORIGIN = 0x82000000, LENGTH = 1M
+}
+
+SECTIONS
+{
+    .text : {
+        KEEP(*(.text._start))
+        KEEP(*(.text.start))
+        *(.text)
+        *(.text.*)
+    } > ROM
+
+    .rodata : {
+        *(.rodata)
+        *(.rodata.*)
+    } > ROM
+
+    .init_array : {
+        __init_array_start = .;
+        KEEP(*(.init_array))
+        KEEP(*(.init_array.*))
+        __init_array_end = .;
+    } > ROM
+
+    .data : {
+        __data_start = .;
+        *(.data)
+        *(.data.*)
+        __data_end = .;
+    } > RAM AT> ROM
+    __data_load = LOADADDR(.data);
+
+    .bss : {
+        __bss_start = .;
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+        __bss_end = .;
+    } > RAM
+
+    .stack (NOLOAD) : {
+        . = ALIGN(16);
+        __stack_bottom = .;
+        . += 8K;
+        __stack_top = .;
+    } > RAM
+
+    .ringbuf (NOLOAD) : ALIGN(64)
+    {
+        __ringbuf_start = .;
+        KEEP(*(.ringbuf))
+        . = ALIGN(64);
+        __ringbuf_end = .;
+    } > LOGRAM
+
+    /DISCARD/ : {
+        *(.eh_frame)
+        *(.eh_frame.*)
+        *(.eh_frame_hdr)
+        *(.comment)
+        *(.note.*)
+        *(.debug_*)
+        *(.stab*)
+        *(.llvm_*)
+        *(.rela.*)
+    }
+}
-- 
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