From 7e2032ec239b78cbda1bef5667ed96d13ebc5bf9 Mon Sep 17 00:00:00 2001 From: Nathan Lee Date: Wed, 10 Jun 2026 22:59:21 -0500 Subject: implement a simple uart + show that kernel test works --- src/main.rs | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) (limited to 'src/main.rs') diff --git a/src/main.rs b/src/main.rs index bbf89b6..a3571c7 100644 --- a/src/main.rs +++ b/src/main.rs @@ -5,14 +5,11 @@ pub mod state; use crate::core::*; use crate::mem::Memory; use crate::state::CpuState; -use std::collections::HashSet; -use std::io; -use std::io::Write; -use std::process::exit; const MEMORY_SIZE: usize = 64 * 1024 * 1024; const REGISTER_NAME_WIDTH: u32 = 0b11111; const RO_TARGET: u32 = 0x80000000; +const UART_ADDR: u32 = 0x10000000; fn main() { let path = std::path::PathBuf::from("wkern.bin"); @@ -22,9 +19,20 @@ fn main() { let mut state = CpuState::new(memory); + state.memory.write_multiple_bytes(RO_TARGET as usize, f_dat.as_slice(), 99).unwrap(); + state.memory.write(UART_ADDR as usize, 99, 0).unwrap(); + state.pc = RO_TARGET; + loop { { handle_instruction(&mut state); + + // simple polling uart + let uart_byte = state.memory.read(UART_ADDR as usize, 99).unwrap(); + if uart_byte != 0 { + print!("{}", uart_byte as char); + } + state.memory.write(UART_ADDR as usize, 99, 0).unwrap(); } } } -- cgit v1.2.3