From 7b5e07c788bbb1dde8ea4df6643d0868e9ada785 Mon Sep 17 00:00:00 2001
From: Nathan Lee <me@nwlee.tech>
Date: Sun, 12 Jul 2026 12:49:54 -0500
Subject: switch from PCIe controller to SoC components

PCIe is too hard to implement so i'm using SoC components instead
---
 wrv32em-common.dts | 35 +++++++++++------------------------
 1 file changed, 11 insertions(+), 24 deletions(-)

(limited to 'wrv32em-common.dts')

diff --git a/wrv32em-common.dts b/wrv32em-common.dts
index 834d430..e7c1181 100644
--- a/wrv32em-common.dts
+++ b/wrv32em-common.dts
@@ -10,29 +10,16 @@
         reg = <0x70000000
                0x04000000>;
     };
-    /*
-    pcie@40000000 {
-        compatible = "vendor,soc-pci";
-        device_type = "pci";
+    gpu@60000000 {
+        compatible = "browser,soc-wgpu";
+        device_type = "gpu";
+        status = "disabled";
+        reg = <0x60000000 0x04000000>;
+    }
+    uart@60000000 {
+        compatible = "unix,soc-tty";
+        device_type = "gpu";
         status = "okay";
-
-        reg = <0x40000000 0x1000000>;
-        #address-cells = <3>;
-        #size-cells = <2>;
-
-        bus-range = <0x00 0xff>;
-
-        ranges = <
-            /* flag      PCI address  CPU address    size    *//*
-            0x81000000 0x0 0x00000000  0x50000000 0x00100000 /*32-bit memory space*//*
-            0x81000000 0x0 0x00000000  0x4f000000 0x00010000 /* IO space *//*
-        >;
-
-        dma-ranges = <
-            0x42000000  0x0 0x00000000  0x00000000  0xffffffff
-        >;
-
-
-    };
-    */
+        reg = <0x60000000 0x04000000>;
+    }
 };
-- 
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