implement a simple uart + show that kernel test works

4 files changed, 19 insertions, 10 deletions

diff --git a/.gitignore b/.gitignore
index 40d9aca..8ae2689 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,2 +1,3 @@
 /target
-/.idea
\ No newline at end of file
+/.idea
+wkern.bin
\ No newline at end of file
diff --git a/hi b/hi
deleted file mode 100755
index b41bdd9..0000000
--- a/hi
+++ /dev/null
diff --git a/src/main.rs b/src/main.rs
index bbf89b6..a3571c7 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -5,14 +5,11 @@ pub mod state;
 use crate::core::*;
 use crate::mem::Memory;
 use crate::state::CpuState;
-use std::collections::HashSet;
-use std::io;
-use std::io::Write;
-use std::process::exit;
 
 const MEMORY_SIZE: usize = 64 * 1024 * 1024;
 const REGISTER_NAME_WIDTH: u32 = 0b11111;
 const RO_TARGET: u32 = 0x80000000;
+const UART_ADDR: u32 = 0x10000000;
 
 fn main() {
     let path = std::path::PathBuf::from("wkern.bin");
@@ -22,9 +19,20 @@ fn main() {
 
     let mut state = CpuState::new(memory);
 
+    state.memory.write_multiple_bytes(RO_TARGET as usize, f_dat.as_slice(), 99).unwrap();
+    state.memory.write(UART_ADDR as usize, 99, 0).unwrap();
+    state.pc = RO_TARGET;
+
     loop {
         {
             handle_instruction(&mut state);
+
+            // simple polling uart
+            let uart_byte = state.memory.read(UART_ADDR as usize, 99).unwrap();
+            if uart_byte != 0 {
+                print!("{}", uart_byte as char);
+            }
+            state.memory.write(UART_ADDR as usize, 99, 0).unwrap();
         }
     }
 }
diff --git a/src/mem.rs b/src/mem.rs
index 8d0e9dc..7458c67 100644
--- a/src/mem.rs
+++ b/src/mem.rs
@@ -15,12 +15,12 @@ impl Memory {
     pub fn new(size: usize) -> Memory {
         let mut pages: Vec<Page> = Vec::with_capacity(size / PAGE_SIZE);
         for i in 0..size / PAGE_SIZE {
-            pages[i] = Page {
+            pages.push(Page {
                 virtual_addr: usize::MAX,
                 real_addr: i * PAGE_SIZE,
                 permission: 0,
                 allocated: 0,
-            }
+            });
         }
         Memory {
             memory: vec![0u8; size].into_boxed_slice(),
@@ -93,8 +93,8 @@ impl Memory {
         address: usize,
         size: usize,
         permission: usize,
-    ) -> Result<Box<[u8]>, ()> {
-        let mut ret = [];
+    ) -> Result<Vec<u8>, ()> {
+        let mut ret = vec![0; size];
         for addr in address..address + size {
             if let Ok(byte) = self.read(addr, permission) {
                 ret[addr - address] = byte;
@@ -102,7 +102,7 @@ impl Memory {
                 return Err(());
             }
         }
-        Ok(Box::new(ret))
+        Ok(ret)
     }
 
     pub fn write_multiple_bytes(