diff options
| author | Nathan Lee <me@nwlee.tech> | 2026-06-23 21:54:22 -0500 |
|---|---|---|
| committer | Nathan Lee <me@nwlee.tech> | 2026-06-23 21:54:22 -0500 |
| commit | c493f0997d1cb107667e516c5d6ef00443922f5c (patch) | |
| tree | 8a059b218c7b9348470e4e6a64573e5969d19549 | |
| parent | 3ba80868b455858082cae0c4e902d27ce24d97ed (diff) | |
move dts source into the emulator directory
| -rw-r--r-- | .gitignore | 3 | ||||
| -rw-r--r-- | build.rs | 26 | ||||
| -rw-r--r-- | src/main.rs | 2 | ||||
| -rw-r--r-- | wrv32em-common.dts | 38 |
4 files changed, 66 insertions, 3 deletions
@@ -1,4 +1,3 @@ /target /.idea -wkern.bin -*.dtb
\ No newline at end of file +wkern.bin
\ No newline at end of file diff --git a/build.rs b/build.rs new file mode 100644 index 0000000..829bb31 --- /dev/null +++ b/build.rs @@ -0,0 +1,26 @@ +use std::process::Command; +use std::path::Path; + +fn main() { + println!("cargo:rerun-if-changed=wrv32em-common.dts"); + + let out_dir = std::env::var("OUT_DIR").unwrap(); + let output = Path::new(&out_dir).join("wrv32em-common.dtb"); + + let status = Command::new("dtc") + .args([ + "-I", "dts", + "-O", "dtb", + "-o", + output.to_str().unwrap(), + "wrv32em-common.dts", + ]) + .status() + .expect("failed to run dtc"); + + if !status.success() { + panic!("dtc failed"); + } + + println!("cargo:rustc-env=DTB_PATH={}", output.display()); +}
\ No newline at end of file diff --git a/src/main.rs b/src/main.rs index 69134ac..45f567f 100644 --- a/src/main.rs +++ b/src/main.rs @@ -17,7 +17,7 @@ fn main() { let path = std::path::PathBuf::from("wkern.bin"); let f_dat = std::fs::read(path).expect("Unable to read file"); - let dtb_dat = std::fs::read(std::path::PathBuf::from("v1.dtb")).expect("Unable to read file"); + let dtb_dat = std::fs::read(env!("DTB_PATH")).expect("Unable to read file"); let memory = Memory::new(MEMORY_SIZE); diff --git a/wrv32em-common.dts b/wrv32em-common.dts new file mode 100644 index 0000000..834d430 --- /dev/null +++ b/wrv32em-common.dts @@ -0,0 +1,38 @@ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + memory@70000000 { + device_type = "memory"; + status = "okay"; + reg = <0x70000000 + 0x04000000>; + }; + /* + pcie@40000000 { + compatible = "vendor,soc-pci"; + device_type = "pci"; + status = "okay"; + + reg = <0x40000000 0x1000000>; + #address-cells = <3>; + #size-cells = <2>; + + bus-range = <0x00 0xff>; + + ranges = < + /* flag PCI address CPU address size *//* + 0x81000000 0x0 0x00000000 0x50000000 0x00100000 /*32-bit memory space*//* + 0x81000000 0x0 0x00000000 0x4f000000 0x00010000 /* IO space *//* + >; + + dma-ranges = < + 0x42000000 0x0 0x00000000 0x00000000 0xffffffff + >; + + + }; + */ +}; |
