1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
|
use elf::ElfBytes;
use elf::endian::AnyEndian;
use std::io;
use std::io::Write;
use std::sync::{LazyLock, Mutex};
const ABI: [&str; 32] = [
"x0", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5",
"a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11", "t3", "t4", "t5",
"t6",
];
static MEMORY: LazyLock<Mutex<[u8; 64 * 1024 * 1024]>> =
LazyLock::new(|| Mutex::new([0u8; 64 * 1024 * 1024]));
fn main() {
let path = std::path::PathBuf::from("hi");
let f_dat = std::fs::read(path).expect("Unable to read file");
let elf = ElfBytes::<AnyEndian>::minimal_parse(f_dat.as_slice()).expect("Unable to parse elf");
let (sh, stab) = elf
.section_headers_with_strtab()
.expect("Unable to get section headers");
let dup = f_dat.clone();
// write memory
{
let mut memory = MEMORY.lock().expect("Unable to get memory");
for i in 0..dup.len() {
memory[i] = dup[i];
}
}
let mut registers: [u32; 32] = [0; 32];
let mut pc: u32 = 0;
let str_tab = stab.expect("Cannot read strtab");
if let Some(headers) = sh {
for header in headers {
// Search for .text
if let Ok(sh_name) = str_tab.get(header.sh_name as usize)
&& sh_name == ".text"
{
let (sh_data, _) = elf
.section_data(&header)
.expect("Unable to get section data");
pc = header.sh_addr as u32;
}
}
}
loop {
let mut memory = MEMORY.lock().expect("Unable to get memory");
handle_instruction(&mut *memory, &mut registers, pc);
pc += 4;
}
}
fn handle_instruction(memory: &mut [u8], registers: &mut [u32], pc: u32) {
let word = u32::from_le_bytes([
memory[pc as usize],
memory[pc as usize + 1],
memory[pc as usize + 2],
memory[pc as usize + 3],
]);
let opcode = word & 0x7f;
match opcode {
0b0110011 => {
let f7 = word >> 25;
let f3 = (word >> 12) & 0b111;
let rs2 = ((word >> 20) & 0b11111) as usize;
let rs1 = ((word >> 15) & 0b11111) as usize;
let rd = ((word >> 7) & 0b11111) as usize;
match (f7 << 3) | f3 {
0 => registers[rd] = registers[rs1] + registers[rs2], // add
256 => registers[rd] = registers[rs1] - registers[rs2], // sub
4 => registers[rd] = registers[rs1] ^ registers[rs2], // xor
6 => registers[rd] = registers[rs1] | registers[rs2], // or
7 => registers[rd] = registers[rs1] & registers[rs2], // and
1 => registers[rd] = registers[rs1] << registers[rs2], // sll
5 => registers[rd] = registers[rs1] >> registers[rs2], // srl
261 => registers[rd] = ((registers[rs1] as i32) >> registers[rs2]) as u32, // sra
2 => {
let rs1_signed: i32 = registers[rs1] as i32;
let rs2_signed: i32 = registers[rs2] as i32;
registers[rd] = if rs1_signed < rs2_signed { 1 } else { 0 }; // slt
}
3 => {
registers[rd] = if registers[rs1] < registers[rs2] {
1
} else {
0
}
} // sltu
_ => panic!("Illegal instruction: {:x}", word),
}
}
0b0010011 => {
let imm = ((word as i32) >> 20) as u32;
let f3 = (word >> 12) & 0b111;
let rs1 = ((word >> 15) & 0b11111) as usize;
let rd = ((word >> 7) & 0b11111) as usize;
match f3 {
0 => registers[rd] = registers[rs1] + imm, // addi
4 => registers[rd] = registers[rs1] ^ imm, // xori
6 => registers[rd] = registers[rs1] | imm, // ori
7 => registers[rd] = registers[rs1] & imm, // andi
1 => {
if (word >> 5) != 0 {
panic!("Illegal instruction: {:x}", word);
}
registers[rd] = registers[rs1] << (imm & 0b11111); // slli
}
5 => {
if (word >> 5) != 0 {
panic!("Illegal instruction: {:x}", word);
}
if (imm >> 5) & 0b1111111 == 0 {
registers[rd] = registers[rs1] >> (imm & 0b11111); // srli
} else {
registers[rd] = ((registers[rs1] >> (imm & 0b11111)) as i32) as u32; // srai
}
}
2 => {
registers[rd] = if (registers[rs1] as i32) < (imm as i32) {
1
} else {
0
}
} // slti
3 => registers[rd] = if registers[rs1] < imm { 1 } else { 0 }, // sltiu
_ => panic!("Illegal instruction: {:x}", word),
}
}
0b0000011 => {
let imm = word >> 20;
let f3 = (word >> 12) & 0b111;
let rs1 = ((word >> 15) & 0b11111) as usize;
let rd = ((word >> 7) & 0b11111) as usize;
match f3 {
0 => {
let byte: u8 = memory[(registers[rs1] + imm) as usize];
registers[rd] = (byte as i8) as u32; // lb
}
1 => {
let low = memory[(registers[rs1] + imm) as usize];
let high = memory[(registers[rs1] + imm + 1) as usize];
registers[rd] = (((high as u16) << 8 | low as u16) as i16) as u32; // lh
}
2 => {
let addr = (registers[rs1] + imm) as usize;
let slice = memory.get(addr..addr + 4).unwrap();
let number: u32 = slice.iter().fold(0u32, |acc, &n| (acc << 8) | n as u32);
registers[rd] = number; // lw
}
4 => {
println!("lbu {} {} {}", ABI[rd], ABI[rs1], imm & 0xFF);
}
5 => println!("lhu {} {} {}", ABI[rd], ABI[rs1], imm & 0xFFFF),
_ => panic!("Illegal instruction: {:x}", word),
}
}
0b0100011 => {
let imm_low = (word >> 7) & 0b11111;
let imm_high = (word >> 25) & 0b1111111;
let f3 = (word >> 12) & 0b111;
let rs1 = ((word >> 15) & 0b11111) as usize;
let rs2 = ((word >> 20) & 0b11111) as usize;
let imm = (imm_high << 5) | imm_low;
match f3 {
0 => println!("sb {} {} {}", ABI[rs1], ABI[rs2], imm & 0xFF),
1 => println!("sh {} {} {}", ABI[rs1], ABI[rs2], imm & 0xFFFF),
2 => println!("sw {} {} {}", ABI[rs1], ABI[rs2], imm & 0xFFFFFF),
_ => panic!("Illegal instruction: {:x}", word),
};
}
0b1100011 => println!("B-type (todo)"),
0b1101111 => println!("J-type (todo)"),
0b1100111 => println!("jalr"),
0b0110111 => {
let imm = word >> 12;
let rd = ((word >> 7) & 0b11111) as usize;
println!("lui {} {}", rd, imm as i32);
registers[rd] = imm << 12;
}
0b0010111 => {
let imm = word >> 12;
let rd = (word >> 7) & 0b11111;
registers[rd as usize] = pc + (imm << 12); // auipc
}
0b1110011 => {
// ecall
eprintln!(
"TRAP! syscall {} with gp registers {:?} calling instruction {:x}",
registers[17],
®isters[10..17],
pc
);
if registers[17] == 0 {
// sys_write: just a debug
let buf = registers[11] as usize;
let len = registers[12] as usize;
let total_bytes = &memory[buf..buf + len];
io::stdout().write(&total_bytes).unwrap();
}
}
_ => panic!("Illegal instruction or todo: {:x}", word),
}
}
|