move memory and cpu state into its own files

1 files changed, 203 insertions, 191 deletions

diff --git a/src/core.rs b/src/core.rs
index 251336e..67a21de 100644
--- a/src/core.rs
+++ b/src/core.rs
@@ -1,77 +1,81 @@
+use crate::state::CpuState;
 use std::num::FpCategory;
 
-pub fn add(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1].wrapping_add(registers[rs2]);
+pub fn add(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = state.registers[rs1].wrapping_add(state.registers[rs2]);
 }
 
-pub fn sub(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1].wrapping_sub(registers[rs2]);
+pub fn sub(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = state.registers[rs1].wrapping_sub(state.registers[rs2]);
 }
 
-pub fn xor(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1] ^ registers[rs2];
+pub fn xor(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = state.registers[rs1] ^ state.registers[rs2];
 }
 
-pub fn or(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1] | registers[rs2];
+pub fn or(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = state.registers[rs1] | state.registers[rs2];
 }
 
-pub fn and(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1] & registers[rs2];
+pub fn and(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = state.registers[rs1] & state.registers[rs2];
 }
 
-pub fn sll(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1] << (registers[rs2] & 0b11111);
+pub fn sll(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = state.registers[rs1] << (state.registers[rs2] & 0b11111);
 }
 
-pub fn srl(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1] >> (registers[rs2] & 0b11111);
+pub fn srl(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = state.registers[rs1] >> (state.registers[rs2] & 0b11111);
 }
 
-pub fn sra(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = ((registers[rs1] as i32) >> (registers[rs2] & 0b11111)) as u32;
+pub fn sra(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] =
+        ((state.registers[rs1] as i32) >> (state.registers[rs2] & 0b11111)) as u32;
 }
 
-pub fn slt(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    let rs1_signed = registers[rs1] as i32;
-    let rs2_signed = registers[rs2] as i32;
+pub fn slt(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    let rs1_signed = state.registers[rs1] as i32;
+    let rs2_signed = state.registers[rs2] as i32;
 
-    registers[rd] = if rs1_signed < rs2_signed { 1 } else { 0 };
+    state.registers[rd] = if rs1_signed < rs2_signed { 1 } else { 0 };
 }
 
-pub fn sltu(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = if registers[rs1] < registers[rs2] {
+pub fn sltu(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = if state.registers[rs1] < state.registers[rs2] {
         1
     } else {
         0
     };
 }
 
-pub fn mul(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1].wrapping_mul(registers[rs2]);
+pub fn mul(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = state.registers[rs1].wrapping_mul(state.registers[rs2]);
 }
 
-pub fn mulh(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] =
-        (((registers[rs1] as i32 as i64) * (registers[rs2] as i32 as i64)) >> 32) as u32;
+pub fn mulh(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = (((state.registers[rs1] as i32 as i64)
+        * (state.registers[rs2] as i32 as i64))
+        >> 32) as u32;
 }
 
-pub fn mulhsu(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    let rs1_signed = (registers[rs1] as i32) as i64;
-    let rs2_unsigned = registers[rs2] as i64;
+pub fn mulhsu(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    let rs1_signed = (state.registers[rs1] as i32) as i64;
+    let rs2_unsigned = state.registers[rs2] as i64;
 
-    registers[rd] = ((rs1_signed * rs2_unsigned) >> 32) as u32;
+    state.registers[rd] = ((rs1_signed * rs2_unsigned) >> 32) as u32;
 }
 
-pub fn mulhu(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = ((registers[rs1] as u64 * registers[rs2] as u64) >> 32) as u32;
+pub fn mulhu(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] =
+        ((state.registers[rs1] as u64 * state.registers[rs2] as u64) >> 32) as u32;
 }
 
-pub fn div(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    let a = registers[rs1] as i32;
-    let b = registers[rs2] as i32;
+pub fn div(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    let a = state.registers[rs1] as i32;
+    let b = state.registers[rs2] as i32;
 
-    registers[rd] = if b == 0 {
+    state.registers[rd] = if b == 0 {
         u32::MAX
     } else if a == i32::MIN && b == -1 {
         a as u32
@@ -80,19 +84,19 @@ pub fn div(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
     };
 }
 
-pub fn divu(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = if registers[rs2] == 0 {
+pub fn divu(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = if state.registers[rs2] == 0 {
         u32::MAX
     } else {
-        registers[rs1] / registers[rs2]
+        state.registers[rs1] / state.registers[rs2]
     };
 }
 
-pub fn rem(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    let a = registers[rs1] as i32;
-    let b = registers[rs2] as i32;
+pub fn rem(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    let a = state.registers[rs1] as i32;
+    let b = state.registers[rs2] as i32;
 
-    registers[rd] = if b == 0 {
+    state.registers[rd] = if b == 0 {
         a as u32
     } else if a == i32::MIN && b == -1 {
         0
@@ -101,184 +105,210 @@ pub fn rem(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
     };
 }
 
-pub fn remu(registers: &mut [u32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = if registers[rs2] == 0 {
-        registers[rs1]
+pub fn remu(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = if state.registers[rs2] == 0 {
+        state.registers[rs1]
     } else {
-        registers[rs1] % registers[rs2]
+        state.registers[rs1] % state.registers[rs2]
     };
 }
 
-pub fn addi(registers: &mut [u32; 32], rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = registers[rs1].wrapping_add(imm);
+pub fn addi(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = state.registers[rs1].wrapping_add(imm);
 }
 
-pub fn xori(registers: &mut [u32; 32], rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = registers[rs1] ^ imm;
+pub fn xori(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = state.registers[rs1] ^ imm;
 }
 
-pub fn ori(registers: &mut [u32; 32], rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = registers[rs1] | imm;
+pub fn ori(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = state.registers[rs1] | imm;
 }
 
-pub fn andi(registers: &mut [u32; 32], rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = registers[rs1] & imm;
+pub fn andi(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = state.registers[rs1] & imm;
 }
 
-pub fn slli(registers: &mut [u32; 32], rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = registers[rs1] << (imm & 0b11111);
+pub fn slli(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = state.registers[rs1] << (imm & 0b11111);
 }
-pub fn srli(registers: &mut [u32; 32], rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = registers[rs1] >> (imm & 0b11111);
+pub fn srli(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = state.registers[rs1] >> (imm & 0b11111);
 }
-pub fn srai(registers: &mut [u32; 32], rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = ((registers[rs1] as i32) >> (imm & 0b11111)) as u32;
+pub fn srai(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = ((state.registers[rs1] as i32) >> (imm & 0b11111)) as u32;
 }
 
-pub fn slti(registers: &mut [u32; 32], rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = if (registers[rs1] as i32) < (imm as i32) {
+pub fn slti(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = if (state.registers[rs1] as i32) < (imm as i32) {
         1
     } else {
         0
     };
 }
 
-pub fn sltiu(registers: &mut [u32; 32], rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = if registers[rs1] < imm { 1 } else { 0 };
+pub fn sltiu(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = if state.registers[rs1] < imm { 1 } else { 0 };
 }
-pub fn lb(registers: &mut [u32; 32], memory: &[u8], rd: usize, rs1: usize, imm: u32) {
-    let byte = memory[(registers[rs1] + imm) as usize];
-    registers[rd] = (byte as i8) as u32;
+pub fn lb(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    let byte = state
+        .memory
+        .read((state.registers[rs1] + imm) as usize, 99)
+        .unwrap();
+    state.registers[rd] = (byte as i8) as u32;
 }
 
-pub fn lh(registers: &mut [u32; 32], memory: &[u8], rd: usize, rs1: usize, imm: u32) {
-    let low = memory[(registers[rs1] + imm) as usize];
-    let high = memory[(registers[rs1] + imm + 1) as usize];
+pub fn lh(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    let bytes = state
+        .memory
+        .read_multiple_bytes((state.registers[rs1] + imm) as usize, 2, 99)
+        .unwrap();
 
-    registers[rd] = (((high as u16) << 8 | low as u16) as i16) as u32;
+    state.registers[rd] = (((bytes[1] as u16) << 8 | bytes[0] as u16) as i16) as u32;
 }
 
-pub fn lw(registers: &mut [u32; 32], memory: &[u8], rd: usize, rs1: usize, imm: u32) {
-    let addr = (registers[rs1] + imm) as usize;
-    let slice = memory.get(addr..addr + 4).unwrap();
-    let number = u32::from_le_bytes(slice.try_into().unwrap());
+pub fn lw(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    let addr = (state.registers[rs1] + imm) as usize;
+    let slice = state.memory.read_multiple_bytes(addr, 4, 99).unwrap();
+    let number = u32::from_le_bytes(slice[0..4].try_into().unwrap());
 
-    registers[rd] = number;
+    state.registers[rd] = number;
 }
 
-pub fn lbu(registers: &mut [u32; 32], memory: &[u8], rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = memory[(registers[rs1] + imm) as usize] as u32;
+pub fn lbu(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = state
+        .memory
+        .read((state.registers[rs1] + imm) as usize, 99)
+        .unwrap() as u32;
 }
 
-pub fn lhu(registers: &mut [u32; 32], memory: &[u8], rd: usize, rs1: usize, imm: u32) {
-    let low = memory[(registers[rs1] + imm) as usize];
-    let high = memory[(registers[rs1] + imm + 1) as usize];
+pub fn lhu(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    let bytes = state
+        .memory
+        .read_multiple_bytes((state.registers[rs1] + imm) as usize, 2, 99)
+        .unwrap();
 
-    registers[rd] = ((high as u16) << 8 | low as u16) as u32;
+    state.registers[rd] = ((bytes[1] as u16) << 8 | bytes[0] as u16) as u32;
 }
-pub fn sb(registers: &[u32; 32], memory: &mut [u8], rs1: usize, rs2: usize, imm: u32) {
-    memory[(registers[rs1] + imm) as usize] = registers[rs2] as u8;
+pub fn sb(state: &mut CpuState, rs1: usize, rs2: usize, imm: u32) {
+    state
+        .memory
+        .write(
+            (state.registers[rs1] + imm) as usize,
+            99,
+            state.registers[rs2] as u8,
+        )
+        .unwrap();
 }
 
-pub fn sh(registers: &[u32; 32], memory: &mut [u8], rs1: usize, rs2: usize, imm: u32) {
-    let halfword = registers[rs2] & 0xFFFF;
-    let index = (registers[rs1] + imm) as usize;
+pub fn sh(state: &mut CpuState, rs1: usize, rs2: usize, imm: u32) {
+    let halfword = state.registers[rs2] & 0xFFFF;
+    let index = (state.registers[rs1] + imm) as usize;
 
-    memory[index] = (halfword & 0xFF) as u8;
-    memory[index + 1] = (halfword >> 8) as u8;
+    state
+        .memory
+        .write_multiple_bytes(index, &[(halfword & 0xFF) as u8, (halfword >> 8) as u8], 99)
+        .unwrap();
 }
 
-pub fn sw(registers: &[u32; 32], memory: &mut [u8], rs1: usize, rs2: usize, imm: u32) {
-    let index = (registers[rs1] + imm) as usize;
+pub fn sw(state: &mut CpuState, rs1: usize, rs2: usize, imm: u32) {
+    let index = (state.registers[rs1] + imm) as usize;
 
-    memory[index..index + 4].copy_from_slice(&registers[rs2].to_le_bytes());
+    state
+        .memory
+        .write_multiple_bytes(index, &state.registers[rs2].to_le_bytes(), 99)
+        .unwrap();
 }
 
-pub fn beq(registers: &[u32; 32], pc: &mut u32, rs1: usize, rs2: usize, imm: u32) {
-    if registers[rs1] == registers[rs2] {
-        *pc += imm;
+pub fn beq(state: &mut CpuState, rs1: usize, rs2: usize, imm: u32) {
+    if state.registers[rs1] == state.registers[rs2] {
+        state.pc += imm;
     }
 }
 
-pub fn bne(registers: &[u32; 32], pc: &mut u32, rs1: usize, rs2: usize, imm: u32) {
-    if registers[rs1] != registers[rs2] {
-        *pc += imm;
+pub fn bne(state: &mut CpuState, rs1: usize, rs2: usize, imm: u32) {
+    if state.registers[rs1] != state.registers[rs2] {
+        state.pc += imm;
     }
 }
 
-pub fn blt(registers: &[u32; 32], pc: &mut u32, rs1: usize, rs2: usize, imm: u32) {
-    if (registers[rs1] as i32) < (registers[rs2] as i32) {
-        *pc += imm;
+pub fn blt(state: &mut CpuState, rs1: usize, rs2: usize, imm: u32) {
+    if (state.registers[rs1] as i32) < (state.registers[rs2] as i32) {
+        state.pc += imm;
     }
 }
 
-pub fn bge(registers: &[u32; 32], pc: &mut u32, rs1: usize, rs2: usize, imm: u32) {
-    if (registers[rs1] as i32) >= (registers[rs2] as i32) {
-        *pc += imm;
+pub fn bge(state: &mut CpuState, rs1: usize, rs2: usize, imm: u32) {
+    if (state.registers[rs1] as i32) >= (state.registers[rs2] as i32) {
+        state.pc += imm;
     }
 }
 
-pub fn bltu(registers: &[u32; 32], pc: &mut u32, rs1: usize, rs2: usize, imm: u32) {
-    if registers[rs1] < registers[rs2] {
-        *pc += imm;
+pub fn bltu(state: &mut CpuState, rs1: usize, rs2: usize, imm: u32) {
+    if state.registers[rs1] < state.registers[rs2] {
+        state.pc += imm;
     }
 }
 
-pub fn bgeu(registers: &[u32; 32], pc: &mut u32, rs1: usize, rs2: usize, imm: u32) {
-    if registers[rs1] >= registers[rs2] {
-        *pc += imm;
+pub fn bgeu(state: &mut CpuState, rs1: usize, rs2: usize, imm: u32) {
+    if state.registers[rs1] >= state.registers[rs2] {
+        state.pc += imm;
     }
 }
-pub fn jal(registers: &mut [u32; 32], pc: &mut u32, rd: usize, imm: u32) {
-    registers[rd] = *pc + 4;
-    *pc += imm;
+pub fn jal(state: &mut CpuState, rd: usize, imm: u32) {
+    state.registers[rd] = state.pc + 4;
+    state.pc += imm;
 }
 
-pub fn jalr(registers: &mut [u32; 32], pc: &mut u32, rd: usize, rs1: usize, imm: u32) {
-    registers[rd] = *pc + 4;
-    *pc = registers[rs1] + imm;
+pub fn jalr(state: &mut CpuState, rd: usize, rs1: usize, imm: u32) {
+    state.registers[rd] = state.pc + 4;
+    state.pc = state.registers[rs1] + imm;
 }
-pub fn lui(registers: &mut [u32; 32], rd: usize, imm: u32) {
-    registers[rd] = imm << 12;
+pub fn lui(state: &mut CpuState, rd: usize, imm: u32) {
+    state.registers[rd] = imm << 12;
 }
 
-pub fn auipc(registers: &mut [u32; 32], pc: u32, rd: usize, imm: u32) {
-    registers[rd] = pc + (imm << 12);
+pub fn auipc(state: &mut CpuState, pc: u32, rd: usize, imm: u32) {
+    state.registers[rd] = pc + (imm << 12);
 }
 
-pub fn fmadd_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize, rs3: usize) {
-    registers[rd] = registers[rs1] * registers[rs2] + registers[rs3];
+pub fn fmadd_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize, rs3: usize) {
+    state.f_registers[rd] =
+        state.f_registers[rs1] * state.f_registers[rs2] + state.f_registers[rs3];
 }
 
-pub fn fmsub_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize, rs3: usize) {
-    registers[rd] = registers[rs1] * registers[rs2] - registers[rs3];
+pub fn fmsub_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize, rs3: usize) {
+    state.f_registers[rd] =
+        state.f_registers[rs1] * state.f_registers[rs2] - state.f_registers[rs3];
 }
 
-pub fn fnmadd_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize, rs3: usize) {
-    registers[rd] = -registers[rs1] * registers[rs2] + registers[rs3];
+pub fn fnmadd_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize, rs3: usize) {
+    state.f_registers[rd] =
+        -state.f_registers[rs1] * state.f_registers[rs2] + state.f_registers[rs3];
 }
 
-pub fn fnmsub_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize, rs3: usize) {
-    registers[rd] = -registers[rs1] * registers[rs2] - registers[rs3];
+pub fn fnmsub_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize, rs3: usize) {
+    state.f_registers[rd] =
+        -state.f_registers[rs1] * state.f_registers[rs2] - state.f_registers[rs3];
 }
 
-pub fn fadd_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1] + registers[rs2];
+pub fn fadd_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.f_registers[rd] = state.f_registers[rs1] + state.f_registers[rs2];
 }
 
-pub fn fsub_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1] - registers[rs2];
+pub fn fsub_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.f_registers[rd] = state.f_registers[rs1] - state.f_registers[rs2];
 }
 
-pub fn fmul_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1] * registers[rs2];
+pub fn fmul_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.f_registers[rd] = state.f_registers[rs1] * state.f_registers[rs2];
 }
 
-pub fn fdiv_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize) {
-    let a = registers[rs1];
-    let b = registers[rs2];
+pub fn fdiv_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    let a = state.f_registers[rs1];
+    let b = state.f_registers[rs2];
 
-    registers[rd] = if b == 0.0 {
+    state.f_registers[rd] = if b == 0.0 {
         f32::NAN
         // todo: raise division by zero in csr
     } else {
@@ -286,99 +316,81 @@ pub fn fdiv_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize) {
     }
 }
 
-pub fn fsqrt_s(registers: &mut [f32; 32], rd: usize, rs1: usize) {
-    registers[rd] = registers[rs1].sqrt();
+pub fn fsqrt_s(state: &mut CpuState, rd: usize, rs1: usize) {
+    state.f_registers[rd] = state.f_registers[rs1].sqrt();
 }
 
-pub fn fsgnj_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1].abs() * registers[rs2].signum();
+pub fn fsgnj_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.f_registers[rd] = state.f_registers[rs1].abs() * state.f_registers[rs2].signum();
 }
-pub fn fsgnjn_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1].abs() * -registers[rs2].signum();
+pub fn fsgnjn_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.f_registers[rd] = state.f_registers[rs1].abs() * -state.f_registers[rs2].signum();
 }
 
-pub fn fsgnjx_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1] * registers[rs2].signum();
+pub fn fsgnjx_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.f_registers[rd] = state.f_registers[rs1] * state.f_registers[rs2].signum();
 }
-pub fn fmin_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1].min(registers[rs2]);
+pub fn fmin_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.f_registers[rd] = state.f_registers[rs1].min(state.f_registers[rs2]);
 }
-pub fn fmax_s(registers: &mut [f32; 32], rd: usize, rs1: usize, rs2: usize) {
-    registers[rd] = registers[rs1].max(registers[rs2]);
+pub fn fmax_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.f_registers[rd] = state.f_registers[rs1].max(state.f_registers[rs2]);
 }
 
-pub fn fcvt_s_w(registers: &mut [u32; 32], f_registers: &mut [f32; 32], rd: usize, rs1: usize) {
-    f_registers[rd] = registers[rs1] as i32 as f32;
+pub fn fcvt_s_w(state: &mut CpuState, rd: usize, rs1: usize) {
+    state.f_registers[rd] = state.registers[rs1] as i32 as f32;
 }
 
-pub fn fcvt_s_wu(registers: &mut [u32; 32], f_registers: &mut [f32; 32], rd: usize, rs1: usize) {
-    f_registers[rd] = registers[rs1] as f32;
+pub fn fcvt_s_wu(state: &mut CpuState, rd: usize, rs1: usize) {
+    state.f_registers[rd] = state.registers[rs1] as f32;
 }
 
-pub fn fcvt_w_s(registers: &mut [u32; 32], f_registers: &mut [f32; 32], rd: usize, rs1: usize) {
-    registers[rd] = f_registers[rs1] as i32 as u32;
+pub fn fcvt_w_s(state: &mut CpuState, rd: usize, rs1: usize) {
+    state.registers[rd] = state.f_registers[rs1] as i32 as u32;
 }
 
-pub fn fcvt_wu_s(registers: &mut [u32; 32], f_registers: &mut [f32; 32], rd: usize, rs1: usize) {
-    registers[rd] = f_registers[rs1] as u32;
+pub fn fcvt_wu_s(state: &mut CpuState, rd: usize, rs1: usize) {
+    state.registers[rd] = state.f_registers[rs1] as u32;
 }
 
-pub fn fmv_x_w(registers: &mut [u32; 32], f_registers: &mut [f32; 32], rd: usize, rs1: usize) {
-    registers[rd] = u32::from_le_bytes(f_registers[rs1].to_le_bytes());
+pub fn fmv_x_w(state: &mut CpuState, rd: usize, rs1: usize) {
+    state.registers[rd] = u32::from_le_bytes(state.f_registers[rs1].to_le_bytes());
 }
 
-pub fn fmv_w_x(registers: &mut [u32; 32], f_registers: &mut [f32; 32], rd: usize, rs1: usize) {
-    f_registers[rd] = f32::from_le_bytes(registers[rs1].to_le_bytes());
+pub fn fmv_w_x(state: &mut CpuState, rd: usize, rs1: usize) {
+    state.f_registers[rd] = f32::from_le_bytes(state.registers[rs1].to_le_bytes());
 }
 
-pub fn feq_s(
-    registers: &mut [u32; 32],
-    f_registers: &mut [f32; 32],
-    rd: usize,
-    rs1: usize,
-    rs2: usize,
-) {
-    registers[rd] = if f_registers[rs1] == f_registers[rs2] {
+pub fn feq_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = if state.f_registers[rs1] == state.f_registers[rs2] {
         1
     } else {
         0
     }
 }
 
-pub fn flt_s(
-    registers: &mut [u32; 32],
-    f_registers: &mut [f32; 32],
-    rd: usize,
-    rs1: usize,
-    rs2: usize,
-) {
-    registers[rd] = if f_registers[rs1] < f_registers[rs2] {
+pub fn flt_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = if state.f_registers[rs1] < state.f_registers[rs2] {
         1
     } else {
         0
     }
 }
 
-pub fn fle_s(
-    registers: &mut [u32; 32],
-    f_registers: &mut [f32; 32],
-    rd: usize,
-    rs1: usize,
-    rs2: usize,
-) {
-    registers[rd] = if f_registers[rs1] <= f_registers[rs2] {
+pub fn fle_s(state: &mut CpuState, rd: usize, rs1: usize, rs2: usize) {
+    state.registers[rd] = if state.f_registers[rs1] <= state.f_registers[rs2] {
         1
     } else {
         0
     }
 }
 
-pub fn fclass_s(registers: &mut [u32; 32], f_registers: &mut [f32; 32], rd: usize, rs1: usize) {
-    let number = f_registers[rs1];
+pub fn fclass_s(state: &mut CpuState, rd: usize, rs1: usize) {
+    let number = state.f_registers[rs1];
     let class = number.classify();
     let frac_msb = (number.to_bits() >> 22) & 0x01;
 
-    registers[rd] = match class {
+    state.registers[rd] = match class {
         FpCategory::Nan => {
             if frac_msb == 0 {
                 0b1