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authorNathan Lee <me@nwlee.tech>2026-06-10 22:59:21 -0500
committerNathan Lee <me@nwlee.tech>2026-06-10 22:59:21 -0500
commit7e2032ec239b78cbda1bef5667ed96d13ebc5bf9 (patch)
tree65ea80173b620d670cc18294ed980adb884143da /src/mem.rs
parent648aa3f51786f3078b347c169c183dc4fc8a173f (diff)
implement a simple uart + show that kernel test works
Diffstat (limited to 'src/mem.rs')
-rw-r--r--src/mem.rs10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mem.rs b/src/mem.rs
index 8d0e9dc..7458c67 100644
--- a/src/mem.rs
+++ b/src/mem.rs
@@ -15,12 +15,12 @@ impl Memory {
pub fn new(size: usize) -> Memory {
let mut pages: Vec<Page> = Vec::with_capacity(size / PAGE_SIZE);
for i in 0..size / PAGE_SIZE {
- pages[i] = Page {
+ pages.push(Page {
virtual_addr: usize::MAX,
real_addr: i * PAGE_SIZE,
permission: 0,
allocated: 0,
- }
+ });
}
Memory {
memory: vec![0u8; size].into_boxed_slice(),
@@ -93,8 +93,8 @@ impl Memory {
address: usize,
size: usize,
permission: usize,
- ) -> Result<Box<[u8]>, ()> {
- let mut ret = [];
+ ) -> Result<Vec<u8>, ()> {
+ let mut ret = vec![0; size];
for addr in address..address + size {
if let Ok(byte) = self.read(addr, permission) {
ret[addr - address] = byte;
@@ -102,7 +102,7 @@ impl Memory {
return Err(());
}
}
- Ok(Box::new(ret))
+ Ok(ret)
}
pub fn write_multiple_bytes(